problem stringlengths 66 76k | answer stringlengths 29 75.8k |
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Convert the following CUDA code to AMD GPU code:
cuda
#include <iostream>
#include <cuda_runtime.h>
#include <curand_kernel.h>
#define N 256
#define DT 0.001f
#define CUTOFF 1.0f
#define EPS 1e-6f
// Structure to hold particle data
struct Particle {
float3 pos;
float3 vel;
float3 acc;
};
// Kernel to ini... | #include <iostream>
#include <hip/hip_runtime.h>
#include <hiprand/hiprand_kernel.h>
#define N 256
#define DT 0.001f
#define CUTOFF 1.0f
#define EPS 1e-6f
// Structure to hold particle data
struct Particle {
float3 pos;
float3 vel;
float3 acc;
};
// Kernel to initialize particles
__global__ void initPart... |
Convert the following CUDA code to AMD GPU code:
cuda
#include <iostream>
#include <cuda_runtime.h>
#include <cuda_fp16.h>
#include <vector>
// Define the number of non-zero elements and matrix dimensions
#define NNZ 128
#define ROWS 128
#define COLS 128
// Kernel for sparse matrix-vector multiplication
__global__ vo... | #include <iostream>
#include <hip/hip_runtime.h>
#include <hip/hip_fp16.h>
#include <vector>
// Define the number of non-zero elements and matrix dimensions
#define NNZ 128
#define ROWS 128
#define COLS 128
// Kernel for sparse matrix-vector multiplication
__global__ void spmv_csr_kernel(const int* rowPtr, const int*... |
Convert the following CUDA code to AMD GPU code:
cuda
#include <iostream>
#include <cuda_runtime.h>
#include <thrust/host_vector.h>
#include <thrust/device_vector.h>
#include <thrust/sort.h>
#include <thrust/scan.h>
#include <thrust/copy.h>
#include <thrust/fill.h>
#include <thrust/transform.h>
#include <thrust/adjacen... | #include <iostream>
#include <hip/hip_runtime.h>
#include <thrust/host_vector.h>
#include <thrust/device_vector.h>
#include <thrust/sort.h>
#include <thrust/scan.h>
#include <thrust/copy.h>
#include <thrust/fill.h>
#include <thrust/transform.h>
#include <thrust/adjacent_difference.h>
#include <thrust/extrema.h>
#includ... |
Convert the following CUDA code to AMD GPU code:
cuda
#include <iostream>
#include <curand_kernel.h>
#include <cuda_runtime.h>
// Define constants
#define PATHS_PER_BLOCK 128
#define PATHS 2048
#define SIMULATION_STEPS 100
#define MAX_DEPTH 1
// Kernel to initialize random number generators
__global__ void initRandom... | #include <iostream>
#include <hiprand/hiprand_kernel.h>
#include <hip/hip_runtime.h>
// Define constants
#define PATHS_PER_BLOCK 128
#define PATHS 2048
#define SIMULATION_STEPS 100
#define MAX_DEPTH 1
// Kernel to initialize random number generators
__global__ void initRandomStates(hiprandState *states, unsigned long... |
Convert the following CUDA code to AMD GPU code:
cuda
#include <iostream>
#include <cuda_runtime.h>
#include <cooperative_groups.h>
namespace cg = cooperative_groups;
#define BLOCK_SIZE 32
#define GRID_SIZE 64
__global__ void heat2DExplicitKernel(float* d_u, float* d_u_new, float dx, float dy, float dt, float alpha,... | #include <iostream>
#include <hip/hip_runtime.h>
#include <hip/hip_cooperative_groups.h>
namespace cg = cooperative_groups;
#define BLOCK_SIZE 32
#define GRID_SIZE 64
__global__ void heat2DExplicitKernel(float* d_u, float* d_u_new, float dx, float dy, float dt, float alpha, int N) {
int i = blockIdx.x * blockDim... |
Convert the following CUDA code to AMD GPU code:
cuda
#include <iostream>
#include <cuda_runtime.h>
#include <cooperative_groups.h>
#include <cuComplex.h>
using namespace cooperative_groups;
#define N 2048
#define BLOCK_SIZE 256
__global__ void spectralFluidKernel(cuComplex *d_u_hat, cuComplex *d_v_hat, cuComplex *d... | #include <iostream>
#include <hip/hip_runtime.h>
#include <hip/hip_cooperative_groups.h>
#include <hip/hip_complex.h>
using namespace cooperative_groups;
#define N 2048
#define BLOCK_SIZE 256
__global__ void spectralFluidKernel(hipComplex *d_u_hat, hipComplex *d_v_hat, hipComplex *d_u, hipComplex *d_v, float dt, flo... |
Convert the following CUDA code to AMD GPU code:
cuda
#include <iostream>
#include <cuda_runtime.h>
#include <thrust/device_vector.h>
#include <thrust/sort.h>
#include <thrust/copy.h>
#include <thrust/fill.h>
#include <thrust/sequence.h>
// Kernel for bipartite matching-based sorting
__global__ void bipartite_matching... | #include <iostream>
#include <hip/hip_runtime.h>
#include <thrust/device_vector.h>
#include <thrust/sort.h>
#include <thrust/copy.h>
#include <thrust/fill.h>
#include <thrust/sequence.h>
// Kernel for bipartite matching-based sorting
__global__ void bipartite_matching_sort_kernel(int *d_array, int *d_temp, int n) {
... |
Convert the following CUDA code to AMD GPU code:
cuda
#include <iostream>
#include <cuda_runtime.h>
#include <cuda.h>
// Define the image width and height
#define WIDTH 1024
#define HEIGHT 1024
// Define the block size
#define BLOCK_WIDTH 16
#define BLOCK_HEIGHT 16
// Kernel for image segmentation using threshold
__... | #include <iostream>
#include <hip/hip_runtime.h>
// Define the image width and height
#define WIDTH 1024
#define HEIGHT 1024
// Define the block size
#define BLOCK_WIDTH 16
#define BLOCK_HEIGHT 16
// Kernel for image segmentation using threshold
__global__ void thresholdSegmentationKernel(unsigned char* inputImage,... |
Convert the following CUDA code to AMD GPU code:
cuda
#include <iostream>
#include <cuda_runtime.h>
#include <thrust/host_vector.h>
#include <thrust/device_vector.h>
#include <thrust/sort.h>
#include <thrust/copy.h>
#include <thrust/adjacent_difference.h>
#include <thrust/scan.h>
#include <thrust/sequence.h>
#include <... | #include <iostream>
#include <hip/hip_runtime.h>
#include <thrust/host_vector.h>
#include <thrust/device_vector.h>
#include <thrust/sort.h>
#include <thrust/copy.h>
#include <thrust/adjacent_difference.h>
#include <thrust/scan.h>
#include <thrust/sequence.h>
#include <thrust/fill.h>
#include <thrust/transform.h>
#inclu... |
Convert the following CUDA code to AMD GPU code:
cuda
#include <iostream>
#include <cuda_runtime.h>
// Define a simple structure to represent a sparse tensor element
struct SparseTensorElement {
int row;
int col;
float value;
};
// CUDA kernel to perform operations on a sparse tensor
__global__ void spars... | #include <iostream>
#include <hip/hip_runtime.h>
// Define a simple structure to represent a sparse tensor element
struct SparseTensorElement {
int row;
int col;
float value;
};
// CUDA kernel to perform operations on a sparse tensor
__global__ void sparseTensorKernel(SparseTensorElement* elements, float*... |
Convert the following CUDA code to AMD GPU code:
cuda
// monte_carlo_option_pricing.cu
#include <iostream>
#include <cuda_runtime.h>
#include <curand_kernel.h>
// Constants for the simulation
#define NUM_PATHS 64
#define NUM_STEPS 100
#define BLOCK_SIZE 32
// Kernel to perform Monte Carlo simulation
__global__ void m... | // monte_carlo_option_pricing.cu
#include <iostream>
#include <hip/hip_runtime.h>
#include <hiprand/hiprand_kernel.h>
// Constants for the simulation
#define NUM_PATHS 64
#define NUM_STEPS 100
#define BLOCK_SIZE 32
// Kernel to perform Monte Carlo simulation
__global__ void monteCarloSimulation(float *d_results, floa... |
Convert the following CUDA code to AMD GPU code:
cuda
#include <iostream>
#include <cuda_runtime.h>
// Define constants
#define POPULATION_SIZE 1024
#define GENES_PER_INDIVIDUAL 32
#define NUM_THREADS 256
#define NUM_BLOCKS (POPULATION_SIZE / NUM_THREADS)
// CUDA kernel for genetic algorithm
__global__ void geneticAl... | #include <iostream>
#include <hip/hip_runtime.h>
// Define constants
#define POPULATION_SIZE 1024
#define GENES_PER_INDIVIDUAL 32
#define NUM_THREADS 256
#define NUM_BLOCKS (POPULATION_SIZE / NUM_THREADS)
// CUDA kernel for genetic algorithm
__global__ void geneticAlgorithmKernel(float* population, float* fitness) {
... |
Convert the following CUDA code to AMD GPU code:
cuda
#include <iostream>
#include <cuda_runtime.h>
// Kernel to perform parallel reduction using shared memory
__global__ void reduceProductKernel(int *g_idata, int *g_odata, int n) {
extern __shared__ int sdata[];
// Load shared mem from global mem
unsigne... | #include <iostream>
#include <hip/hip_runtime.h>
// Kernel to perform parallel reduction using shared memory
__global__ void reduceProductKernel(int *g_idata, int *g_odata, int n) {
extern __shared__ int sdata[];
// Load shared mem from global mem
unsigned int tid = threadIdx.x;
unsigned int i = block... |
Convert the following CUDA code to AMD GPU code:
cuda
#include <iostream>
#include <cuda_runtime.h>
// Define the sparse tensor structure
typedef struct {
int nnz; // Number of non-zero elements
int *row_indices; // Row indices for non-zero elements
int *col_indices; // Column indices for no... | #include <iostream>
#include <hip/hip_runtime.h>
// Define the sparse tensor structure
typedef struct {
int nnz; // Number of non-zero elements
int *row_indices; // Row indices for non-zero elements
int *col_indices; // Column indices for non-zero elements
float *values; // Values o... |
Convert the following CUDA code to AMD GPU code:
cuda
// hartley_transform.cu
#include <iostream>
#include <cuda_runtime.h>
#include <cmath>
#define N 4096
#define BLOCK_SIZE 256
__device__ float2 ComplexMul(float2 a, float2 b) {
return make_float2(a.x * b.x - a.y * b.y, a.x * b.y + a.y * b.x);
}
__device__ floa... | // hartley_transform.cu
#include <iostream>
#include <hip/hip_runtime.h>
#include <cmath>
#define N 4096
#define BLOCK_SIZE 256
__device__ float2 ComplexMul(float2 a, float2 b) {
return make_float2(a.x * b.x - a.y * b.y, a.x * b.y + a.y * b.x);
}
__device__ float2 ComplexAdd(float2 a, float2 b) {
return make... |
Convert the following CUDA code to AMD GPU code:
cuda
#include <iostream>
#include <cuda_runtime.h>
#include <cuComplex.h>
// Define a simple sparse FFT kernel using shared memory and atomics
// This example assumes a very simple sparse matrix structure for demonstration purposes
// In practice, the sparsity pattern a... | #include <iostream>
#include <hip/hip_runtime.h>
#include <hip/hip_complex.h>
// Define a simple sparse FFT kernel using shared memory and atomics
// This example assumes a very simple sparse matrix structure for demonstration purposes
// In practice, the sparsity pattern and FFT algorithm would be more complex
#defi... |
Convert the following CUDA code to AMD GPU code:
cuda
#include <iostream>
#include <cuda_runtime.h>
#include <curand_kernel.h>
#define N 512
#define BLOCK_SIZE 16
__global__ void initializeParticles(curandState *states, float4 *positions, float4 *velocities, int seed) {
int idx = blockIdx.x * blockDim.x + threadI... | #include <iostream>
#include <hip/hip_runtime.h>
#include <hiprand/hiprand_kernel.h>
#define N 512
#define BLOCK_SIZE 16
__global__ void initializeParticles(hiprandState *states, float4 *positions, float4 *velocities, int seed) {
int idx = blockIdx.x * blockDim.x + threadIdx.x;
if (idx < N) {
hiprandS... |
Convert the following CUDA code to AMD GPU code:
cuda
#include <iostream>
#include <cuda_runtime.h>
#include <curand_kernel.h>
#define NUM_PARTICLES 128
#define DIMENSIONS 6
// Structure to hold particle data
struct Particle {
float position[DIMENSIONS];
float velocity[DIMENSIONS];
float pBestPosition[DIM... | #include <iostream>
#include <hip/hip_runtime.h>
#include <hiprand/hiprand_kernel.h>
#define NUM_PARTICLES 128
#define DIMENSIONS 6
// Structure to hold particle data
struct Particle {
float position[DIMENSIONS];
float velocity[DIMENSIONS];
float pBestPosition[DIMENSIONS];
float pBestValue;
};
// Ker... |
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