static void apic_reset_common(DeviceState *d)

{

    APICCommonState *s = DO_UPCAST(APICCommonState, busdev.qdev, d);

    APICCommonClass *info = APIC_COMMON_GET_CLASS(s);

    bool bsp;

    bsp = cpu_is_bsp(s->cpu_env);

    s->apicbase = 0xfee00000 |

        (bsp ? MSR_IA32_APICBASE_BSP : 0) | MSR_IA32_APICBASE_ENABLE;

    s->vapic_paddr = 0;

    info->vapic_base_update(s);

    apic_init_reset(d);

    if (bsp) {

        /*

         * LINT0 delivery mode on CPU #0 is set to ExtInt at initialization

         * time typically by BIOS, so PIC interrupt can be delivered to the

         * processor when local APIC is enabled.

         */

        s->lvt[APIC_LVT_LINT0] = 0x700;

    }

}


uint32_t HELPER(neon_max_f32)(uint32_t a, uint32_t b)

{

    float32 f0 = make_float32(a);

    float32 f1 = make_float32(b);

    return (float32_compare_quiet(f0, f1, NFS) == 1) ? a : b;

}


static void virtqueue_map_desc(unsigned int *p_num_sg, hwaddr *addr, struct iovec *iov,
                               unsigned int max_num_sg, bool is_write,
                               hwaddr pa, size_t sz)
{
    unsigned num_sg = *p_num_sg;
    assert(num_sg <= max_num_sg);
    if (!sz) {
        error_report("virtio: zero sized buffers are not allowed");
    while (sz) {
        hwaddr len = sz;
        if (num_sg == max_num_sg) {
            error_report("virtio: too many write descriptors in indirect table");
        iov[num_sg].iov_base = cpu_physical_memory_map(pa, &len, is_write);
        iov[num_sg].iov_len = len;
        addr[num_sg] = pa;
        sz -= len;
        pa += len;
        num_sg++;
    *p_num_sg = num_sg;


void tcp_start_outgoing_migration(MigrationState *s, const char *host_port, Error **errp)

{

    inet_nonblocking_connect(host_port, tcp_wait_for_connect, s, errp);

}


static void generate_silence(uint8_t* buf, enum AVSampleFormat sample_fmt, size_t size)

{

    int fill_char = 0x00;

    if (sample_fmt == AV_SAMPLE_FMT_U8)

        fill_char = 0x80;

    memset(buf, fill_char, size);

}


static void gen_check_sr(DisasContext *dc, uint32_t sr)

{

    if (!xtensa_option_bits_enabled(dc->config, sregnames[sr].opt_bits)) {

        if (sregnames[sr].name) {

            qemu_log("SR %s is not configured\n", sregnames[sr].name);

        } else {

            qemu_log("SR %d is not implemented\n", sr);

        }

        gen_exception_cause(dc, ILLEGAL_INSTRUCTION_CAUSE);

    }

}


static int bt_hid_out(struct bt_hid_device_s *s)

{

    USBPacket p;

    if (s->data_type == BT_DATA_OUTPUT) {

        p.pid = USB_TOKEN_OUT;

        p.devep = 1;

        p.data = s->dataout.buffer;

        p.len = s->dataout.len;

        s->dataout.len = s->usbdev->info->handle_data(s->usbdev, &p);

        return s->dataout.len;

    }

    if (s->data_type == BT_DATA_FEATURE) {

        /* XXX:

         * does this send a USB_REQ_CLEAR_FEATURE/USB_REQ_SET_FEATURE

         * or a SET_REPORT? */

        p.devep = 0;

    }

    return -1;

}


size_t mptsas_config_manufacturing_1(MPTSASState *s, uint8_t **data, int address)

{

    /* VPD - all zeros */

    return MPTSAS_CONFIG_PACK(1, MPI_CONFIG_PAGETYPE_MANUFACTURING, 0x00,

                              "s256");

}


static void init_proc_620 (CPUPPCState *env)

{

    gen_spr_ne_601(env);

    gen_spr_620(env);

    /* Time base */

    gen_tbl(env);

    /* Hardware implementation registers */

    /* XXX : not implemented */

    spr_register(env, SPR_HID0, "HID0",

                 SPR_NOACCESS, SPR_NOACCESS,

                 &spr_read_generic, &spr_write_generic,

                 0x00000000);

    /* Memory management */

    gen_low_BATs(env);

    gen_high_BATs(env);

    init_excp_620(env);

    env->dcache_line_size = 64;

    env->icache_line_size = 64;

    /* Allocate hardware IRQ controller */

    ppc6xx_irq_init(env);

}


static void kvm_set_phys_mem(MemoryRegionSection *section, bool add)

{

    KVMState *s = kvm_state;

    KVMSlot *mem, old;

    int err;

    MemoryRegion *mr = section->mr;

    bool log_dirty = memory_region_is_logging(mr);

    bool writeable = !mr->readonly && !mr->rom_device;

    bool readonly_flag = mr->readonly || memory_region_is_romd(mr);

    hwaddr start_addr = section->offset_within_address_space;

    ram_addr_t size = int128_get64(section->size);

    void *ram = NULL;

    unsigned delta;

    /* kvm works in page size chunks, but the function may be called

       with sub-page size and unaligned start address. Pad the start

       address to next and truncate size to previous page boundary. */

    delta = (TARGET_PAGE_SIZE - (start_addr & ~TARGET_PAGE_MASK));

    delta &= ~TARGET_PAGE_MASK;

    if (delta > size) {

        return;

    }

    start_addr += delta;

    size -= delta;

    size &= TARGET_PAGE_MASK;

    if (!size || (start_addr & ~TARGET_PAGE_MASK)) {

        return;

    }

    if (!memory_region_is_ram(mr)) {

        if (writeable || !kvm_readonly_mem_allowed) {

            return;

        } else if (!mr->romd_mode) {

            /* If the memory device is not in romd_mode, then we actually want

             * to remove the kvm memory slot so all accesses will trap. */

            add = false;

        }

    }

    ram = memory_region_get_ram_ptr(mr) + section->offset_within_region + delta;

    while (1) {

        mem = kvm_lookup_overlapping_slot(s, start_addr, start_addr + size);

        if (!mem) {

            break;

        }

        if (add && start_addr >= mem->start_addr &&

            (start_addr + size <= mem->start_addr + mem->memory_size) &&

            (ram - start_addr == mem->ram - mem->start_addr)) {

            /* The new slot fits into the existing one and comes with

             * identical parameters - update flags and done. */

            kvm_slot_dirty_pages_log_change(mem, log_dirty);

            return;

        }

        old = *mem;

        if ((mem->flags & KVM_MEM_LOG_DIRTY_PAGES) || s->migration_log) {

            kvm_physical_sync_dirty_bitmap(section);

        }

        /* unregister the overlapping slot */

        mem->memory_size = 0;

        err = kvm_set_user_memory_region(s, mem);

        if (err) {

            fprintf(stderr, "%s: error unregistering overlapping slot: %s\n",

                    __func__, strerror(-err));

            abort();

        }

        /* Workaround for older KVM versions: we can't join slots, even not by

         * unregistering the previous ones and then registering the larger

         * slot. We have to maintain the existing fragmentation. Sigh.

         *

         * This workaround assumes that the new slot starts at the same

         * address as the first existing one. If not or if some overlapping

         * slot comes around later, we will fail (not seen in practice so far)

         * - and actually require a recent KVM version. */

        if (s->broken_set_mem_region &&

            old.start_addr == start_addr && old.memory_size < size && add) {

            mem = kvm_alloc_slot(s);

            mem->memory_size = old.memory_size;

            mem->start_addr = old.start_addr;

            mem->ram = old.ram;

            mem->flags = kvm_mem_flags(s, log_dirty, readonly_flag);

            err = kvm_set_user_memory_region(s, mem);

            if (err) {

                fprintf(stderr, "%s: error updating slot: %s\n", __func__,

                        strerror(-err));

                abort();

            }

            start_addr += old.memory_size;

            ram += old.memory_size;

            size -= old.memory_size;

            continue;

        }

        /* register prefix slot */

        if (old.start_addr < start_addr) {

            mem = kvm_alloc_slot(s);

            mem->memory_size = start_addr - old.start_addr;

            mem->start_addr = old.start_addr;

            mem->ram = old.ram;

            mem->flags =  kvm_mem_flags(s, log_dirty, readonly_flag);

            err = kvm_set_user_memory_region(s, mem);

            if (err) {

                fprintf(stderr, "%s: error registering prefix slot: %s\n",

                        __func__, strerror(-err));

#ifdef TARGET_PPC

                fprintf(stderr, "%s: This is probably because your kernel's " \

                                "PAGE_SIZE is too big. Please try to use 4k " \

                                "PAGE_SIZE!\n", __func__);

#endif

                abort();

            }

        }

        /* register suffix slot */

        if (old.start_addr + old.memory_size > start_addr + size) {

            ram_addr_t size_delta;

            mem = kvm_alloc_slot(s);

            mem->start_addr = start_addr + size;

            size_delta = mem->start_addr - old.start_addr;

            mem->memory_size = old.memory_size - size_delta;

            mem->ram = old.ram + size_delta;

            mem->flags = kvm_mem_flags(s, log_dirty, readonly_flag);

            err = kvm_set_user_memory_region(s, mem);

            if (err) {

                fprintf(stderr, "%s: error registering suffix slot: %s\n",

                        __func__, strerror(-err));

                abort();

            }

        }

    }

    /* in case the KVM bug workaround already "consumed" the new slot */

    if (!size) {

        return;

    }

    if (!add) {

        return;

    }

    mem = kvm_alloc_slot(s);

    mem->memory_size = size;

    mem->start_addr = start_addr;

    mem->ram = ram;

    mem->flags = kvm_mem_flags(s, log_dirty, readonly_flag);

    err = kvm_set_user_memory_region(s, mem);

    if (err) {

        fprintf(stderr, "%s: error registering slot: %s\n", __func__,

                strerror(-err));

        abort();

    }

}


void ff_ac3_bit_alloc_calc_psd(int8_t *exp, int start, int end, int16_t *psd,

                               int16_t *band_psd)

{

    int bin, j, k, end1, v;

    /* exponent mapping to PSD */

    for(bin=start;bin<end;bin++) {

        psd[bin]=(3072 - (exp[bin] << 7));

    }

    /* PSD integration */

    j=start;

    k=bin_to_band_tab[start];

    do {

        v = psd[j++];

        end1 = FFMIN(band_start_tab[k+1], end);

        for (; j < end1; j++) {

            /* logadd */

            int adr = FFMIN(FFABS(v - psd[j]) >> 1, 255);

            v = FFMAX(v, psd[j]) + ff_ac3_log_add_tab[adr];

        }

        band_psd[k]=v;

        k++;

    } while (end > band_start_tab[k]);

}


static void gen_flt3_ldst (DisasContext *ctx, uint32_t opc, int fd,

                           int fs, int base, int index)

{

    const char *opn = "extended float load/store";

    int store = 0;

    /* All of those work only on 64bit FPUs. */

    gen_op_cp1_64bitmode();

    if (base == 0) {

        if (index == 0)

            gen_op_reset_T0();

        else

            GEN_LOAD_REG_TN(T0, index);

    } else if (index == 0) {

        GEN_LOAD_REG_TN(T0, base);

    } else {

        GEN_LOAD_REG_TN(T0, base);

        GEN_LOAD_REG_TN(T1, index);

        gen_op_addr_add();

    }

    /* Don't do NOP if destination is zero: we must perform the actual

     * memory access

     */

    switch (opc) {

    case OPC_LWXC1:

        op_ldst(lwc1);

        GEN_STORE_FTN_FREG(fd, WT0);

        opn = "lwxc1";

        break;

    case OPC_LDXC1:

        op_ldst(ldc1);

        GEN_STORE_FTN_FREG(fd, DT0);

        opn = "ldxc1";

        break;

    case OPC_LUXC1:

        op_ldst(luxc1);

        GEN_STORE_FTN_FREG(fd, DT0);

        opn = "luxc1";

        break;

    case OPC_SWXC1:

        GEN_LOAD_FREG_FTN(WT0, fs);

        op_ldst(swc1);

        opn = "swxc1";

        store = 1;

        break;

    case OPC_SDXC1:

        GEN_LOAD_FREG_FTN(DT0, fs);

        op_ldst(sdc1);

        opn = "sdxc1";

        store = 1;

        break;

    case OPC_SUXC1:

        GEN_LOAD_FREG_FTN(DT0, fs);

        op_ldst(suxc1);

        opn = "suxc1";

        store = 1;

        break;

    default:

        MIPS_INVAL(opn);

        generate_exception(ctx, EXCP_RI);

        return;

    }

    MIPS_DEBUG("%s %s, %s(%s)", opn, fregnames[store ? fs : fd],

               regnames[index], regnames[base]);

}


static DeviceState *apic_init(void *env, uint8_t apic_id)

{

    DeviceState *dev;

    SysBusDevice *d;

    static int apic_mapped;

    dev = qdev_create(NULL, "apic");

    qdev_prop_set_uint8(dev, "id", apic_id);

    qdev_prop_set_ptr(dev, "cpu_env", env);

    qdev_init_nofail(dev);

    d = sysbus_from_qdev(dev);

    /* XXX: mapping more APICs at the same memory location */

    if (apic_mapped == 0) {

        /* NOTE: the APIC is directly connected to the CPU - it is not

           on the global memory bus. */

        /* XXX: what if the base changes? */

        sysbus_mmio_map(d, 0, MSI_ADDR_BASE);

        apic_mapped = 1;

    }

    msi_supported = true;

    return dev;

}